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Job Information

Intel Analog Product Development Engineer in Malaysia

Job Description

Drives and develops testability and manufacturability of analog and/or RF integrated circuits from the component feasibility stage through production ramp. Contributes to design, development, and validation of testability circuits through evaluation, development, and debug of complex test methods.

Develops and debugs complex software programs to convert design validation vectors and drive complex test equipment, including the development of digital signal processing, BERTS/Scopes, and automatic test equipment (ATE) for testing analog performance.

Collaborates with designers to drive design for test (DFT) features enabling efficient production testing of new products and requirements for design validation (DV) to ensure performance to internal and industry specifications. Works with the design and/or product development team to perform ATE to DV correlation, debug functionality and performance issues, perform circuit characterization, and design spec validation.

Evaluates new analog IP designs on ATE and works with the design, DFx, and product development teams to debug functionality and performance issues to root cause. Performs ATE and/or bench device characterization, utilizes that data to define datasheet specifications, and performs margin to spec analysis to project yield and PHI concerns.

Releases efficient production test solutions that ensure product quality and performance. Engages with manufacturing to monitor and optimize production yield and resolves any post-release concerns. Reviews test plans with design, conversion of pre-silicon content to patterns, and additional content development as needed, reviews HVM data with design to identify and root cause the issues.

Qualifications

Bachelor's Degree in Electronics, Electrical, Microelectronics, Science or a related technical degree

General knowledge, personal skill, and working experience to be considered as hiring advantage :

  • ATE tester operation and test pattern generation.

  • Statistics and Data Analysis Skills and Data Visualization Eg. Jmp, Perl, C++, Python etc.

  • Semiconductor industrial, possess semiconductor HVM manufacturing process flow knowledge

  • PDE manufacturing and test flow knowledge and experience

  • Possess strong teamwork, communication, problem-solving and influencing skills

  • Fun and cheerful personality with strong learning desires

Preferred Qualifications:

  • HDMT and CMT tester working experience.

  • Familiarity with Design for Test principles.

  • Serial IO and Memory IO PHY knowledge.

  • Good programming skill in python, familiar with industrial IO testing methods.

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. (https://jobs.intel.com/en/benefits)

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

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